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? semiconductor components industries, llc, 2010 june, 2010 -- rev. 3 1 publication order number: ncv4264/d ncv4264 100 ma low dropout linear regulator the ncv4264 is a wide input range, precision 3.3 v and 5.0 v fixed output, low dropout integrated voltage regulator with a full load current rating of 100 ma. the output voltage is accurate within ? 2.0%, and maximum dropout voltage is 500 mv at 100 ma load current. it is internally protected against 45 v input transients, input supply reversal, output overcurrent faults, and excess die temperature. no external components are required to enable these features. features ? 3.3 v and 5.0 v fixed output ? ? 2.0% output accuracy, over full temperature range ? quiescent current 400 m aati out =1.0ma ? 500 mv maximum dropout voltage at 100 ma load current ? wide input voltage operating range of 4.5 v to 45 v ? internal fault protection ? --42 v reverse voltage ? short circuit/overcurrent ? thermal overload ? aec--q100 qualified ? ncv prefix for automotive and other applications requiring site and change controls ? these are pb--free devices sot--223 st suffix case 318e pin connections http://onsemi.com marking diagrams a = assembly location l = wafer lot y = year w = work week x = 3 (3.3 v version) = 5 (5.0 v version) g = pb--free package (top view) gnd v in gnd v out see detailed ordering and shipping information in the package dimensions section on page 10 of this data sheet. ordering information 1 2 3 tab 1 1 ayw v64_x g g (note: microdot may be in either location) nc gnd 18 nc nc nc nc v in v out so--8 sot--223 (top view) so--8 d suffix case 751 1 8 v4264x alyw g 1 8
ncv4264 http://onsemi.com 2 in 1.3 v reference + -- error amp thermal shutdown out gnd figure 1. block diagram pin function description pin no. sot--223 pin no. so--8 symbol function 1 8 v in unregulated input voltage; 4.5 v to 45 v. 2 4 gnd ground; substrate. 3 1 v out regulated output voltage; collector of the internal pnp pass transistor. tab -- gnd ground; substrate and best thermal connection to the die. -- 2,3,5,6,7 nc not connected maximum ratings rating symbol min max unit v in , dc input voltage v in -- 4 2 +45 v v out , dc voltage v out -- 0 . 3 +16 v storage temperature t stg -- 5 5 +150 _ c moisture sensitivity level sot--223 so--8 msl 3 1 -- esd capability, human body model (note 1) v esdhb 4000 -- v esd capability, machine model (note 1) v esdmim 200 -- v lead temperature soldering reflow (smd styles only), lead free (note 2) t sld -- 265 pk _ c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above the recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may affect device reliability. 1. this device series incorporates esd protection and is tested by the following methods: esd hbm tested per aec--q100--002 (eia/jesd22--a 114c) esd mm tested per aec--q100--003 (eia/jesd22--a 115c) 2. lead free, 60 sec ? 150 sec above 217 _ c, 40 sec max at peak. operating range pin symbol, parameter symbol min max unit v in , dc input operating voltage v in 4.5 +45 v junction temperature operating range t j -- 4 0 +150 _ c
ncv4264 http://onsemi.com 3 thermal resistance parameter symbol min max unit junction--to--ambient sot--223 r ja -- 99 (note 3) c/w junction--to--case sot--223 r jc -- 17 junction--to--ambient so--8 r ja -- 162 (note 3) c/w junction--to--lead2 so--8 jl2 -- 45 3. 1 oz., 100 mm 2 copper area. electrical characteristics (v in = 13.5 v, tj = --40 _ c to +150 _ c, unless otherwise noted.) characteristic symbol test conditions min typ max unit output voltage 5.0 v version v out 5.0 ma i out 100 ma (note 4) 6.0 v v in 28 v 4.900 5.000 5.100 v output voltage 3.3 v version v out 5.0 ma i out 100 ma (note 4) 4.5 v v in 28 v 3.234 3.300 3.366 v line regulation 5.0 v version v out vs. v in i out =5.0ma 6.0 v v in 28 v -- 3 0 5.0 +30 mv line regulation 3.3 v version v out vs. v in i out =5.0ma 4.5 v v in 28 v -- 3 0 5.0 +30 mv load regulation v out vs. i out 5.0 ma i out 100 ma (note 4) -- 4 0 5.0 +40 mv dropout voltage 5.0 v version v in -- v out i out = 100 ma (notes 4 & 5) -- 275 500 mv dropout voltage 3.3 v version v in -- v out i out = 100 ma (notes 4 & 7) -- -- 1.266 v quiescent current i q i out =1.0ma -- 100 400 m a active ground current i g(on) i out = 100 ma (note 4) -- 4 15 ma power supply rejection psrr v ripple =0.5v p--p , f = 100 hz -- 67 -- db output capacitor for stability 5.0 v version c out esr i out = 1.0 ma to 100 ma (note 4) 10 -- 9.0 m f output capacitor for stability 3.3 v version c out esr i out = 1.0 ma to 100 ma (note 4) 22 -- -- -- -- 16 m f protection current limit i out(lim) v out = 4.5 v (5.0 v version) (note 4) v out = 3.0 v (3.3 v version) (note 4) 150 150 -- -- 500 500 ma short circuit current limit i out(sc) v out =0v(note4) 40 -- 500 ma thermal shutdown threshold t tsd (note 6) 150 -- 200 _ c 4. use pulse loading to limit power dissipation. 5. dropout voltage = (v in ?v out ), measured when the output voltage has dropped 100 mv relative to the nominal value obtained with v in = 13.5 v. 6. not tested in production. limits are guaranteed by design. 7. v do =v in -- v out . for output voltage set to < 4.5 v, v do will be constrained by the minimum input voltage.
ncv4264 http://onsemi.com 4 figure 2. measurement circuit figure 3. applications circuit 4264 13 2 v out c out 10 m f, 5 . 0 v ve r s i o n 22 m f, 3 . 3 v ve r s i o n c i1 10 m f gnd 4.5--45 v input 4264 13 2 v out output c in 100 nf gnd 4.5--45 v input r l output v in v in 100 nf i q i i c out 10 m f, 5 . 0 v ve r s i o n 22 m f, 3 . 3 v ve r s i o n typical characteristic curves -- 5 v version figure 4. esr characterization (5 v version) figure 5. dropout voltage vs. output load (5 v version) output load (ma) 200 150 100 50 0 0 0.05 0.10 0.15 0.20 0.30 0.40 0.45 dropout voltage (v) 0.25 0.35 125 c -- 4 0 c 25 c output current (ma) 75 100 50 25 0 0 6 8 10 esr ( ) 150 125 stable region v in = 13.5 v c out 10 m f 4 2 unstable region 1 3 5 7 9
ncv4264 http://onsemi.com 5 output current (ma) output load (ma) 200 150 100 50 0 0 2.0 4.0 6.0 8.0 10 12 14 20 15 10 5.0 0 0 50 100 150 250 300 400 450 temperature ( c) 150 100 50 0 -- 5 0 4.90 4.92 4.94 4.98 5.00 5.04 5.08 5.10 current consumption (ma) quiescent current ( m a) output voltage (v) 200 350 4.96 5.02 5.06 125 c -- 4 0 c 25 c 125 c -- 4 0 c 25 c figure 6. current consumption vs. input voltage(5vversion) input voltage (v) 50 40 30 20 10 0 0 2.0 4.0 6.0 8.0 12 14 18 current consumption (ma) 10 16 r l =50 r l = 100 figure 7. current consumption vs. output current (5 v version) figure 8. quiescent current vs. output load (5 v version) figure 9. output voltage vs. temperature (5 v version)
ncv4264 http://onsemi.com 6 typical characteristic curves -- 5 v version input voltage (v) 10 8.0 6.0 4.0 2.0 0 0 1.0 2.0 3.0 4.0 5.0 6.0 output voltage (v) r l =50 figure 10. output current vs. input voltage (5 v version) input voltage (v) 50 40 30 20 10 0 0 20 40 60 80 100 160 180 output current (ma) 120 140 t a =25 c t a = 125 c figure 11. input voltage vs. output voltage (5 v version) figure 12. reverse voltage characteristics (5 v version) input voltage (v) -- 1 5 -- 2 0 -- 2 5 -- 3 0 -- 3 5 -- 4 0 -- 0 . 8 -- 0 . 7 -- 0 . 6 -- 0 . 5 -- 0 . 4 -- 0 . 3 0 output voltage (v) -- 0 . 2 -- 0 . 1 t a = 125 c, r l = t a = 125 c, r l = 100 -- 5 -- 1 0 t a =25 c, r l = t a =--40 c, r l = t a =--40 c, r l = 100 t a =25 c, r l = 100 ncv4264 1 3 2 -- + measurement circuit 1 m f1 m f v out v in r l
ncv4264 http://onsemi.com 7 typical characteristic curves -- 3.3 v version figure 13. esr stability vs. output current (3.3 v version) figure 14. output current vs. input voltage (3.3 v version) output current (ma) input voltage (v) 150 120 90 60 30 0 0 5 10 15 20 40 35 25 20 15 10 5 0 0 30 60 90 120 150 180 figure 15. input voltage vs. quiescent current (3.3 v version) figure 16. quiescent current vs. output current (3.3 v version) input voltage (v) output current (ma) 40 35 30 20 15 10 5 0 0 1.0 2.0 4.0 5.0 6.0 7.0 8.0 150 125 100 75 50 25 0 0 1.0 2.0 3.0 6.0 7.0 9.0 10 figure 17. output voltage vs. temperature (3.3 v version) figure 18. quiescent current vs. temperature (3.3 v version) temperature ( c) temperature ( c) 125 100 75 50 25 0 -- 2 5 -- 5 0 3.234 3.245 3.256 3.267 3.300 3.311 3.333 3.344 150 100 75 50 25 0 -- 2 5 -- 5 0 0.10 0.11 0.12 0.13 0.15 0.16 0.18 0.19 esr ( ) output current (ma) quiescent current (ma) quiescent current (ma) output voltage (v) quiescent current (ma) stable region unstable region c out 22 m f v in = 13.5 v 30 45 25 45 3.0 r l =50 r l = 100 4.0 5.0 8.0 125 c -- 4 0 c 25 c i out =5ma 150 3.278 3.289 3.322 125 0.14 0.17 v in = 13.5 v i out =5ma
ncv4264 http://onsemi.com 8 typical characteristic curves -- 3.3 v version figure 19. power supply rejection ratio (3.3 v version) figure 20. power supply rejection ratio (3.3 v version) 100 k 10 k 1k 100 10 0 10 30 40 50 70 90 mag (db) 20 60 80 100 k 10 k 1k 100 10 0 10 30 40 50 70 90 mag (db) 20 60 80 i out = 150 ma v in = 13.5 v t a =25 c c out =22 m f i out =5ma v in = 13.5 v t a =25 c c out =22 m f
ncv4264 http://onsemi.com 9 circuit description the ncv4264 is a precision trimmed 5.0 v and 3.3 v fixed output regulator. the device has current capability of 100 ma, with 500 mv of dropout voltage at 100 ma of current. the regulation is provided by a pnp pass transistor controlled by an error amplifier with a bandgap reference. the regulator is protected by both current limit and short circuit protection. thermal shutdown occurs above 150 c to protect the ic during overloads and extreme ambient temperatures. regulator the error amplifier compares the reference voltage to a sample of the output voltage (v out ) and drives the base of a pnp series pass transistor by a buffer. the reference is a bandgap design to give it a temperature--stable output. saturation control of the pnp is a function of the load current and input voltage. over saturation of the output power device is prevented, and quiescent current in the ground pin is minimized. regulator stability considerations the input capacitor c in1 in figure 2 is necessary for compensating input line reactance. possible oscillations caused by input inductance and input capacitance can be damped by using a resistor of approximately 1 in series with c in2 . the output or compensation capacitor, c out helps determine three main characteristics of a linear regulator: startup delay, load transient response and loop stability. the capacitor value and type should be based on cost, availability, size and temperature constraints. tantalum, aluminum electrolytic, film, or ceramic capacitors are all acceptable solutions, however, attention must be paid to esr constraints. the aluminum electrolytic capacitor is the least expensive solution, but, if the circuit operates at low temperatures (--25 cto--40 c), both the value and esr of the capacitor will vary considerably. the capacitor manufacturer?s data sheet usually provides this information. the value for the output capacitor c out shown in figure 2 should work for most applications; however, it is not necessarily the optimized solution. stability is guaranteed at values of c q 10 m f, with an esr 9 for the 5.0 v version, and c q 22 m f with an esr 16 for the 3.3 v version within the operating temperature range. actual limits are shown in a graph in the typical performance characteristics section. calculating power dissipation in a single output linear regulator the maximum power dissipation for a single output regulator (figure 3) is: i q(max) + v i(max) ? i q (eq. 1) p d(max) = [v in(max) ? v out(min) ] ? where: v in(max) is the maximum input voltage, v out(min) is the minimum output voltage, i q(max) is the maximum output current for the application, and i q is the quiescent current the regulator consumes at i q(max) . once the value of p d(max) is known, the maximum permissible value of r ja can be calculated: p ja = 150 o c ? t a p d (eq. 2) the value of r ja can then be compared with those in the package section of the data sheet. those packages with r ja ?s less than the calculated value in equation 2 will keep the die temperature below 150 c. in some cases, none of the packages will be sufficient to dissipate the heat generated by the ic, and an external heat sink will be required. the current flow and voltages are shown in the measurement circuit diagram. heat sinks a heat sink effectively increases the surface area of the package to improve the flow of heat away from the ic and into the surrounding air. each material in the heat flow path between the ic and the outside environment will have a thermal resistance. like series electrical resistances, these resistances are summed to determine the value of r ja : r ja = r jc + r cs + r sa (eq. 3) where: r jc = the junction--to--case thermal resistance, r cs = the case--to--heat sink thermal resistance, and r sa = the heat sink--to--ambient thermal resistance. r ja appears in the package section of the data sheet. like r ja , it too is a function of package type. r cs and r sa are functions of the package type, heat sink and the interface between them. these values appear in data sheets of heat sink manufacturers. thermal, mounting, and heat sinking are discussed in the on semiconductor application note an1040/d, available on the on semiconductor website.
ncv4264 http://onsemi.com 10 sot223 figure 21. figure 22. copper area (mm 2 ) 700 600 500 400 300 200 100 0 0 20 40 60 80 100 120 ja ( c/w) sot223 pulsetime(sec) 10 1.0 0.1 0.01 0.001 0.0001 0.00001 0.000001 100 1000 0.1 10 1.0 1000 r(t) ( c/w) 140 160 so--8 100 so--8 ordering information device marking package shipping ? NCV4264ST50T3G v64_5 sot--223 4000 / tape & reel ncv4264st33t3g v64_3 sot--223 4000 / tape & reel ncv4264d50r2g v42645 so--8 2500 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specificati on brochure, brd8011/d.
ncv4264 http://onsemi.com 11 package dimensions sot--223 (to--261) case 318e--04 issue m a1 b1 d e b e e1 4 123 0.08 (0003) a l1 c notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 1.5 0.059 ? mm inches ? scale 6:1 3.8 0.15 2.0 0.079 6.3 0.248 2.3 0.091 2.3 0.091 2.0 0.079 soldering footprint h e dim a min nom max min millimeters 1.50 1.63 1.75 0.060 inches a1 0.02 0.06 0.10 0.001 b 0.60 0.75 0.89 0.024 b1 2.90 3.06 3.20 0.115 c 0.24 0.29 0.35 0.009 d 6.30 6.50 6.70 0.249 e 3.30 3.50 3.70 0.130 e 2.20 2.30 2.40 0.087 0.85 0.94 1.05 0.033 0.064 0.068 0.002 0.004 0.030 0.035 0.121 0.126 0.012 0.014 0.256 0.263 0.138 0.145 0.091 0.094 0.037 0.041 nom max l1 1.50 1.75 2.00 0.060 6.70 7.00 7.30 0.264 0.069 0.078 0.276 0.287 h e -- -- e1 0 1 0 0 1 0
ncv4264 http://onsemi.com 12 package dimensions soic--8 nb case 751--07 issue aj seating plane 1 4 5 8 n j x45 _ k notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. 6. 751--01 thru 751--06 are obsolete. new standard is 751--07. a b s d h c 0.10 (0.004) dim a min max min max inches 4.80 5.00 0.189 0.197 millimeters b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.053 0.069 d 0.33 0.51 0.013 0.020 g 1.27 bsc 0.050 bsc h 0.10 0.25 0.004 0.010 j 0.19 0.25 0.007 0.010 k 0.40 1.27 0.016 0.050 m 0808 n 0.25 0.50 0.010 0.020 s 5.80 6.20 0.228 0.244 -- x -- -- y -- g m y m 0.25 (0.010) -- z -- y m 0.25 (0.010) z s x s m ____ 1.52 0.060 7.0 0.275 0.6 0.024 1.270 0.050 4.0 0.155 ? mm inches ? scale 6:1 *for additional information on our pb--free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to make changes without further noti ce to any products herein. scillc makes no warranty, representation or guarantee regarding the suitab ility of its pr oducts for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liab ility, including without limitation special, cons equential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a situat ion where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc an d its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the desi gn or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any m anner. publication ordering information n. american technical support : 800--282--9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81--3--5773--3850 ncv4264/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303--675--2175 or 800--344--3860 toll free usa/canada fax : 303--675--2176 or 800--344--3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your loc a sales representative

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